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93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2K Microwire Compatible Serial EEPROM
Device Selection Table
Part Number
93AA56A 93AA56B 93LC56A 93LC56B 93C56A 93C56B 93AA56C 93LC56C 93C56C
VCC Range
1.8-5.5 1.8-5-5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 1.8-5.5 2.5-5.5 4.5-5.5
ORG Pin
No No No No No No Yes Yes Yes
Word Size
8-bit 16-bit 8-bit 16-bit 8-bit 16-bit 8 or 16-bit 8 or 16-bit 8 or 16-bit
Temp Ranges
I I I, E I, E I, E I, E I I, E I, E
Packages
P, SN, ST, MS, OT P, SN, ST, MS, OT P, SN, ST, MS, OT P, SN, ST, MS, OT P, SN, ST, MS, OT P, SN, ST, MS, OT P, SN, ST, MS P, SN, ST, MS P, SN, ST, MS
Features
* * * * * * * * * * * * * Low-power CMOS technology ORG pin to select word size for `56C version 256 x 8-bit organization `A' ver. devices (no ORG) 128 x 16-bit organization `B' ver. devices (no ORG) Self-timed ERASE/WRITE cycles (including auto-erase) Automatic ERAL before WRAL Power on/off data protection circuitry Industry standard 3-wire serial I/O Device Status signal (READY/BUSY) Sequential READ function 1,000,000 E/W cycles Data retention > 200 years Temperature ranges supported: - Industrial (I) - Automotive (E) -40C to +85C -40C to +125C
Description
The Microchip Technology Inc. 93XX56A/B/C devices are 2K bit low voltage serial Electrically Erasable PROMs (EEPROM). Word-selectable devices such as the 93AA56C, 93LC56C or 93C56C are dependent upon external logic levels driving the ORG pin to set word size. For dedicated 8-bit communication, the 93AA56A, 93LC56A or 93C56A devices are available, while the 93AA56B, 93LC56B and 93C56B devices provide dedicated 16-bit communication. Advanced CMOS technology makes these devices ideal for low power, nonvolatile memory applications. The entire 93XX Series is available in standard packages including 8-lead PDIP and SOIC, and advanced packaging including 8-lead MSOP, 6-lead SOT-23, and 8-lead TSSOP. Pb-free (Pure Matte Sn) finish is also available.
Package Types (not to scale)
ROTATED SOIC (ex: 93LC56BX) NC 1 2 3 4 8 7 6 5 ORG* VSS DO DI CS CLK DI DO PDIP/SOIC (P, SN) 1 2 3 4 8 7 6 5 VCC NC ORG* VSS
Pin Function Table
Name CS CLK DI DO VSS NC ORG VCC Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground No internal connection Memory Configuration Power Supply
CS CLK DI DO
Function
VCC CS CLK
TSSOP/MSOP
(ST, MS)
1 2 3 4 8 7 6 5 VCC NC ORG* VSS
DO VSS DI
SOT-23 (OT)
1 2 3
6 5 4
VCC CS CLK
* ORG pin is NC on A/B devices
2003 Microchip Technology Inc.
DS21794B-page 1
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings()
VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied ................................................................................................-40C to +125C ESD protection on all pins ...................................................................................................................................................... 4 kV
NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-1: DC CHARACTERISTICS
VCC = range by device (see Table on Page 1) Industrial (I): TA = -40C to +85C Automotive (E): TA = -40C to +125C Min 2.0 0.7 VCC -0.3 -0.3 -- -- 2.4 VCC - 0.2 -- -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- 500 -- -- 100 -- -- Max VCC +1 VCC +1 0.8 0.2 VCC 0.4 0.2 -- -- 1 1 7 2 -- 1 500 -- 1 5 Units V V V V V V V V A A pF mA A mA A A A A Conditions VCC 2.7V VCC < 2.7V VCC 2.7V VCC < 2.7V IOL = 2.1 mA, VCC = 4.5V IOL = 100 A, VCC = 2.5V IOH = -400 A, VCC = 4.5V IOH = -100 A, VCC = 2.5V VIN = VSS to VCC VOUT = VSS to VCC VIN/VOUT = 0V (Note 1) TA = 25C, FCLK = 1 MHz FCLK = 3 MHz, Vcc = 5.5V FCLK = 2 MHz, Vcc = 2.5V FCLK = 3 MHz, VCC = 5.5V FCLK = 2 MHz, VCC = 3.0V FCLK = 2 MHz, VCC = 2.5V I - Temp E - Temp CLK = Cs = 0V ORG = DI = VSS or VCC (Note 2) (Note 3) (Note 1)
All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. D1 D2 D3 D4 D5 D6 D7 D8 D9 VIH1 VIH2 VIL1 VIL2 Vol1 Vol2 VOH1 VOH2 ILI ILO CIN, COUT Parameter High-level input voltage Low-level input voltage Low-level output voltage High-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/ outputs)
ICC write Write current ICC read Read current
D10
ICCS
Standby current
D11
VPOR
VCC voltage detect 93AA56A/B/C, 93LC56A/B/C 93C56A/B/C
-- --
1.5V 3.8V
-- --
V V
Note 1: 2: 3:
This parameter is periodically sampled and not 100% tested. ORG pin not available on `A' or `B' versions. READY/BUSY status must be cleared from DO, see Section 3.4 "Data Out (DO)".
DS21794B-page 2
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
TABLE 1-2: AC CHARACTERISTICS
VCC = range by device (see Table on Page 1) Industrial (I): TA = -40C to +85C Automotive (E): TA = -40C to +125C Min -- Max 3 2 1 -- Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms ms Conditions 4.5V VCC < 5.5V, 93XX56C only 2.5V VCC < 5.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V, 93XX56C only 2.5V VCC < 5.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V, 93XX56C only 2.5V VCC < 5.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 1.8V VCC < 5.5V 1.8V VCC < 5.5V 4.5V VCC < 5.5V, 93XX56C only 2.5V VCC < 5.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V, 93XX56C only 2.5V VCC < 5.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V, CL = 100 pF 2.5V VCC < 4.5V, CL = 100 pF 1.8V VCC < 2.5V, CL = 100 pF 4.5V VCC < 5.5V, (Note 1) 1.8V VCC < 4.5V, (Note 1) 4.5V VCC < 5.5V, CL = 100 pF 2.5V VCC < 4.5V, CL = 100 pF 1.8V VCC < 2.5V, CL = 100 pF Erase/Write mode (AA and LC versions) Erase/Write mode (93C versions) ERAL mode, 4.5V VCC 5.5V WRAL mode, 4.5V VCC 5.5V All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. A1 FCLK Parameter Clock frequency
A2
TCKH
Clock high time
200 250 450 100 200 450 50 100 250 0 250 50 100 250 50 100 250 --
A3
TCKL
Clock low time
--
A4
TCSS
Chip Select setup time
--
A5 A6 A7
TCSH TCSL TDIS
Chip Select hold time Chip Select low time Data input setup time
-- -- --
A8
TDIH
Data input hold time
--
A9
TPD
Data output delay time
200 250 400 100 200 200 300 500 6 2 6 15 --
A10 A11
TCZ TSV
Data output disable time Status valid time
-- --
A12 A13 A14 A15 A16 Note 1: 2:
TWC TWC TEC TWL --
Program cycle time
-- -- -- --
Endurance
1M
cycles 25C, VCC = 5.0V, (Note 2)
This parameter is periodically sampled and not 100% tested. This application is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which may be obtained from www.microchip.com.
2003 Microchip Technology Inc.
DS21794B-page 3
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
FIGURE 1-1:
CS VIH VIL VIH CLK VIL TDIS VIH DI VIL TPD DO (READ) VOH VOL TCZ TSV STATUS VALID TPD TCZ TDIH TCSS TCKH TCKL TCSH
SYNCHRONOUS DATA TIMING
DO VOH (PROGRAM) VOL Note: TSV is relative to CS.
TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX56B OR 93XX56C WITH ORG = 1)
Instruction ERASE ERAL EWDS EWEN READ WRITE WRAL SB 1 1 1 1 1 1 1 Opcode 11 00 00 00 10 01 00 X 1 0 1 X X 0 Address A6 A5 A4 A3 A2 A1 A0 0 0 1 X X X X X X X X X X X X X X X X X X Data In -- -- -- -- -- D15 - D0 D15 - D0 Data Out (RDY/BSY) (RDY/BSY) HIGH-Z HIGH-Z D15 - D0 (RDY/BSY) (RDY/BSY) Req. CLK Cycles 11 11 11 11 27 27 27
A6 A5 A4 A3 A2 A1 A0 A6 A5 A4 A3 A2 A1 A0 1 X X X X X X
TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX56A OR 93XX56C WITH ORG = 0)
Instruction ERASE ERAL EWDS EWEN READ WRITE WRAL SB 1 1 1 1 1 1 1 Opcode 11 00 00 00 10 01 00 Address X A7 A6 A5 A4 A3 A2 A1 A0 1 0 1 0 0 1 X X X X X X X X X X X X X X X X X X X X X Data In -- -- -- -- -- D7 - D0 D7 - D0 Data Out (RDY/BSY) (RDY/BSY) HIGH-Z HIGH-Z D7 - D0 (RDY/BSY) (RDY/BSY) Req. CLK Cycles 12 12 12 12 20 20 20
X A7 A6 A5 A4 A3 A2 A1 A0 X A7 A6 A5 A4 A3 A2 A1 A0 0 1 X X X X X X X
DS21794B-page 4
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.0 FUNCTIONAL DESCRIPTION
2.2 Data In/Data Out (DI/DO)
When the ORG* pin is connected to VCC, the (x16) organization is selected. When it is connected to ground, the (x8) organization is selected. Instructions, addresses and write data are clocked into the DI pin on the rising edge of the clock (CLK). The DO pin is normally held in a HIGH-Z state except when reading data from the device, or when checking the READY/ BUSY status during a programming operation. The READY/BUSY status can be verified during an Erase/ Write operation by polling the DO pin; DO low indicates that programming is still in progress, while DO high indicates the device is ready. DO will enter the HIGH-Z state on the falling edge of CS. It is possible to connect the Data In and Data Out pins together. However, with this configuration it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the Read operation, if A0 is a logic high level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out and the signal source driving A0. The higher the current sourcing capability of A0, the higher the voltage at the Data Out pin. In order to limit this current, a resistor should be connected between DI and DO.
2.3
Data Protection
2.1
START Condition
The START bit is detected by the device if CS and DI are both high with respect to the positive edge of CLK for the first time. Before a START condition is detected, CS, CLK, and DI may change in any combination (except to that of a START condition), without resulting in any device operation (READ, WRITE, ERASE, EWEN, EWDS, ERAL, or WRAL). As soon as CS is high, the device is no longer in Standby mode. An instruction following a START condition will only be executed if the required opcode, address and data bits for any particular instruction are clocked in.
All modes of operation are inhibited when VCC is below a typical voltage of 1.5V for '93AA' and '93LC' devices or 3.8V for '93C' devices. The EWEN and EWDS commands give additional protection against accidentally programming during normal operation. Note: For added protection, an EWDS command should be performed after every write operation.
After power-up, the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be performed before the initial ERASE or WRITE instruction can be executed.
Block Diagram
VCC VSS Address Decoder
Memory Array
Address Counter Data Register DI ORG* CS CLK Mode Decode Logic Clock Register Output Buffer DO
*ORG input is not available on A/B devices
2003 Microchip Technology Inc.
DS21794B-page 5
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.4 ERASE
The ERASE instruction forces all data bits of the specified address to the logical `1' state. CS is brought low following the loading of the last address bit. This falling edge of the CS pin initiates the self-timed programming cycle, except on `93C' devices where the rising edge of CLK before the last address bit initiates the write cycle. The DO pin indicates the READY/BUSY status of the device if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical `0' indicates that programming is still in progress. DO at logical `1' indicates that the register at the specified address has been erased and the device is ready for another instruction. Note: Issuing a START bit and then taking CS low will clear the READY/BUSY status from DO.
FIGURE 2-1:
CS
ERASE TIMING FOR 93AA AND 93LC DEVICES
TCSL CHECK STATUS
CLK
DI
1
1
1
AN
AN-1
AN-2
***
A0 TSV TCZ READY HIGH-Z TWC
DO
HIGH-Z
BUSY
FIGURE 2-2:
CS
ERASE TIMING FOR 93C DEVICES
TCSL CHECK STATUS
CLK
DI
1
1
1
AN
AN-1
AN-2
***
A0 TSV TCZ READY HIGH-Z TWC
DO
HIGH-Z
BUSY
DS21794B-page 6
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.5 ERASE ALL (ERAL)
The Erase All (ERAL) instruction will erase the entire memory array to the logical `1' state. The ERAL cycle is identical to the ERASE cycle, except for the different opcode. The ERAL cycle is completely self-timed and commences at the falling edge of the CS, except on `93C' devices where the rising edge of CLK before the last data bit initiates the write cycle. Clocking of the CLK pin is not necessary after the device has entered the ERAL cycle. The DO pin indicates the READY/BUSY status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). Note: Issuing a START bit and then taking CS low will clear the READY/BUSY status from DO.
VCC must be 4.5V for proper operation of ERAL.
FIGURE 2-3:
CS
ERAL TIMING FOR 93AA AND 93LC DEVICES
TCSL CHECK STATUS
CLK
DI
1
0
0
1
0
X
***
X TSV TCZ READY HIGH-Z
DO
HIGH-Z VCC must be 4.5V for proper operation of ERAL.
BUSY
TEC
FIGURE 2-4:
CS
ERAL TIMING FOR 93C DEVICES
TCSL CHECK STATUS
CLK
DI
1
0
0
1
0
X
***
X TSV TCZ READY HIGH-Z TEC
DO
HIGH-Z
BUSY
2003 Microchip Technology Inc.
DS21794B-page 7
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.6 ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
To protect against accidental data disturbance, the EWDS instruction can be used to disable all ERASE/ WRITE functions and should follow all programming operations. Execution of a READ instruction is independent of both the EWEN and EWDS instructions. The 93XX56A/B/C powers up in the ERASE/WRITE Disable (EWDS) state. All Programming modes must be preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is executed or Vcc is removed from the device.
FIGURE 2-5:
CS
EWDS TIMING
TCSL
CLK
DI
1
0
0
0
0
X
***
X
FIGURE 2-6:
EWEN TIMING
TCSL
CS
CLK
DI
1
0
0
1
1
X
***
X
2.7
READ
The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 8-bit (If ORG pin is low or A-Version devices) or 16-bit (If ORG pin is high or B-version
devices) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is possible when CS is held high. The memory data will automatically cycle to the next register and output sequentially.
FIGURE 2-7:
CS
READ TIMING
CLK
DI
1
1
0
An
***
A0
DO
HIGH-Z
0
Dx
***
D0
Dx
***
D0
Dx
***
D0
DS21794B-page 8
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.8 WRITE
The WRITE instruction is followed by 8 bits (If ORG is low or A-version devices) or 16 bits (If ORG pin is high or B-version devices) of data which are written into the specified address. For 93AA56A/B/C and 93LC56A/B/C devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. For 93C56A/B/C devices, the selftimed auto-erase and programming cycle is initiated by the rising edge of CLK on the last data bit. The DO pin indicates the READY/BUSY status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical `0' indicates that programming is still in progress. DO at logical `1' indicates that the register at the specified address has been written with the data specified and the device is ready for another instruction. Note: Issuing a START bit and then taking CS low will clear the READY/BUSY status from DO.
FIGURE 2-8:
CS
WRITE TIMING FOR 93AA AND 93LC DEVICES
TCSL
CLK
DI
1
0
1
An
***
A0
Dx
***
D0 TSV TCZ READY
DO
HIGH-Z
BUSY
HIGH-Z
Twc
FIGURE 2-9:
CS
WRITE TIMING FOR 93C DEVICES
TCSL
CLK
DI
1
0
1
An
***
A0
Dx
***
D0 TSV TCZ READY
DO
HIGH-Z
BUSY
HIGH-Z
Twc
2003 Microchip Technology Inc.
DS21794B-page 9
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.9 WRITE ALL (WRAL)
The Write All (WRAL) instruction will write the entire memory array with the data specified in the command. For 93AA56A/B/C and 93LC56A/B/C devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. For 93C56A/B/C devices, the self-timed autoerase and programming cycle is initiated by the rising edge of CLK on the last data bit. Clocking of the CLK pin is not necessary after the device has entered the WRAL cycle. The WRAL command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction but the chip must be in the EWEN status. The DO pin indicates the READY/BUSY status of the device if CS is brought high after a minimum of 250 ns low (TCSL). Note: Issuing a START bit and then taking CS low will clear the READY/BUSY status from DO.
VCC must be 4.5V for proper operation of WRAL.
FIGURE 2-10:
CS
WRAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
CLK
DI
1
0
0
0
1
X
***
X
Dx
***
D0 TSV TCZ
DO
HIGH-Z
BUSY TWL
READY HIGH-Z
VCC must be 4.5V for proper operation of WRAL.
FIGURE 2-11:
CS
WRAL TIMING FOR 93C DEVICES
TCSL
CLK
DI
1
0
0
0
1
X
***
X
Dx
***
D0 TSV TCZ
DO
HIGH-Z
BUSY
READY HIGH-Z
TWL
DS21794B-page 10
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
3.0 PIN DESCRIPTIONS
PIN DESCRIPTIONS
SOIC/PDIP/ MSOP/TSSOP 1 2 3 4 5 6 7 8 SOT-23 5 4 3 1 2 N/A N/A 6 Rotated SOIC 3 4 5 6 7 8 1 2 Chip Select Serial Clock Data In Data Out Ground Organization / 93XX56C No Internal Connection / 93XX56A/B No Internal Connection Power Supply Function
TABLE 3-1:
Name CS CLK DI DO VSS ORG/NC NC VCC
3.1
Chip Select (CS)
A high level selects the device; a low level deselects the device and forces it into Standby mode. However, a programming cycle which is already in progress will be completed, regardless of the Chip Select (CS) input signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the programming cycle is completed. CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal control logic is held in a Reset status.
data bits before an instruction is executed. CLK and DI then become don't care inputs waiting for a new START condition to be detected.
3.3
Data In (DI)
Data In (DI) is used to clock in a START bit, opcode, address and data synchronously with the CLK input.
3.4
Data Out (DO)
3.2
Serial Clock (CLK)
Data Out (DO) is used in the Read mode to output data synchronously with the CLK input (TPD after the positive edge of CLK). This pin also provides READY/BUSY status information during ERASE and WRITE cycles. READY/BUSY status information is available on the DO pin if CS is brought high after being low for minimum Chip Select low time (TCSL) and an ERASE or WRITE operation has been initiated. The Status signal is not available on DO, if CS is held low during the entire ERASE or WRITE cycle. In this case, DO is in the HIGH-Z mode. If status is checked after the ERASE/WRITE cycle, the data line will be high to indicate the device is ready. Note: Issuing a START bit and then taking CS low will clear the READY/BUSY status from DO.
The Serial Clock is used to synchronize the communication between a master device and the 93XX series device. Opcodes, address and data bits are clocked in on the positive edge of CLK. Data bits are also clocked out on the positive edge of CLK. CLK can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to clock high time (TCKH) and clock low time (TCKL). This gives the controlling master freedom in preparing opcode, address and data. CLK is a "Don't Care" if CS is low (device deselected). If CS is high, but the START condition has not been detected (DI = 0), any number of clock cycles can be received by the device without changing its status (i.e., waiting for a START condition). CLK cycles are not required during the self-timed WRITE (i.e., auto ERASE/WRITE) cycle. After detection of a START condition the specified number of clock cycles (respectively low to high transitions of CLK) must be provided. These clock cycles are required to clock in all required opcode, address and
3.5
Organization (ORG)
When the ORG pin is connected to VCC or Logic HI, the (x16) memory organization is selected. When the ORG pin is tied to VSS or Logic LO, the (x8) memory organization is selected. For proper operation, ORG must be tied to a valid logic level. 93XX56A devices are always x8 organization and 93XX56B devices are always x16 organization.
2003 Microchip Technology Inc.
DS21794B-page 11
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
8-Lead MSOP (150 mil) Example:
3L56BI 2281L7 MSOP 1st Line Marking Codes Device 93AA56A 93AA56B 93AA56C 93LC56A 93LC56B 93LC56C 93C56A 93C56B 93C56C std mark 3A56AT 3A56BT 3A56CT 3L56AT 3L56BT 3L56CT 3C56AT 3C56BT 3C56CT Pb-free mark GA56AT GA56BT GA56CT GL56AT GL56BT GL56CT GC56AT GC56BT GC56CT
XXXXXXT YWWNNN
6-Lead SOT-23
XXNN
Example:
2EL7
T = blank for commercial, "I" for Industrial, "E" for Extended.
SOT23 Marking Codes
8-Lead PDIP
XXXXXXXX XXXXXNNN YYWW
Example:
93LC56B I/P 1L7 0228
Device 93AA56A 93AA56B 93LC56A 93LC56B 93C56A 93C56B
I-temp 2BNN 2LNN 2ENN 2PNN 2HNN 2TNN
E-temp - - 2FNN 2RNN 2JNN 2UNN
Pb-free topside mark is same; Pb-free noted only on carton label.
8-Lead SOIC
Example:
XXXXXXXX XXXXYYWW NNN
93LC56B I/SN 0228 1L7
TSSOP 1st Line Marking Codes Device 93AA56A 93AA56B 93AA56C 93LC56A 93LC56B 93LC56C 93C56A 93C56B 93C56C std mark A56A A56B A56C L56A L56B L56C C56A C56B C56C Pb-free mark GABA GABB GABC GLBA GLBB GLBC GCBA GCBB GCBC
8-Lead TSSOP XXXX TYWW NNN
Example: L56B I228 1L7
Temperature grade is marked on line 2.
Legend:
XX...X T Blank I E YY WW NNN
Part number Temperature Commercial Industrial Extended Year code (last 2 digits of calendar year) except TSSOP and MSOP which use only the last 1 digit Week code (week of January 1 is week `01') Alphanumeric traceability code
Note:
Custom marking available.
DS21794B-page 12
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E E1
p D 2 B n 1
A c A1 (F)
A2
L
8 Number of Pins Pitch .026 BSC A .043 Overall Height A2 Molded Package Thickness .030 .033 .037 A1 .000 .006 Standoff E Overall Width .193 TYP. E1 .118 BSC Molded Package Width D .118 BSC Overall Length L .016 .024 .031 Foot Length Footprint (Reference) F .037 REF 0 8 Foot Angle c .003 .006 .009 Lead Thickness B .009 .012 .016 Lead Width 5 15 Mold Draft Angle Top 5 15 Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.
Units Dimension Limits n p
MIN
INCHES NOM
MAX
MIN
MILLIMETERS* NOM 8 0.65 BSC 0.75 0.85 0.00 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0.60 0.95 REF 0 0.08 0.22 5 5 -
MAX
1.10 0.95 0.15
0.80 8 0.23 0.40 15 15
JEDEC Equivalent: MO-187
Drawing No. C04-111
2003 Microchip Technology Inc.
DS21794B-page 13
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
6-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E E1
B
p1
D
n
1
c A L A1 A2
Number of Pins 6 Pitch .038 p1 Outside lead pitch (basic) .075 Overall Height A .035 .046 .057 Molded Package Thickness .035 .043 .051 A2 Standoff .000 .003 .006 A1 Overall Width E .102 .110 .118 Molded Package Width .059 .064 .069 E1 Overall Length D .110 .116 .122 Foot Length L .014 .018 .022 Foot Angle 0 5 10 c Lead Thickness .004 .006 .008 Lead Width B .014 .017 .020 Mold Draft Angle Top 0 5 10 Mold Draft Angle Bottom 0 5 10 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEITA (formerly EIAJ) equivalent: SC-74A
Drawing No. C04-120
Units Dimension Limits n p
MIN
INCHES* NOM
MAX
MIN
MILLIMETERS NOM 6 0.95 1.90 0.90 1.18 0.90 1.10 0.00 0.08 2.60 2.80 1.50 1.63 2.80 2.95 0.35 0.45 0 5 0.09 0.15 0.35 0.43 0 5 0 5
MAX
1.45 1.30 0.15 3.00 1.75 3.10 0.55 10 0.20 0.50 10 10
DS21794B-page 14
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
E1
D 2 n 1 E
A
A2
c
L A1
eB
B1 p B
Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB
MIN
INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10
MAX
MIN
.140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
MAX
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
2003 Microchip Technology Inc.
DS21794B-page 15
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC)
E E1
p
D 2 B n 1
h 45
c A A2
L A1
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D h L c B
MIN
.053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
.069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12
MAX
1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
DS21794B-page 16
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP)
E E1 p
D 2 1 n B
A c
L
A1
A2
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B
MIN
INCHES NOM 8 .026
MAX
MIN
.033 .002 .246 .169 .114 .020 0 .004 .007 0 0
.035 .004 .251 .173 .118 .024 4 .006 .010 5 5
.043 .037 .006 .256 .177 .122 .028 8 .008 .012 10 10
MILLIMETERS* NOM MAX 8 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 2.90 3.00 3.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086
2003 Microchip Technology Inc.
DS21794B-page 17
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
APPENDIX A:
Revision B Corrections to Section 1.0, Electrical Characteristics. Section 4.1, 6-Lead SOT-23 package to OT.
REVISION HISTORY
DS21794B-page 18
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip World Wide Web site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape(R) or Microsoft(R) Internet Explorer. Files are also available for FTP download from our FTP site.
SYSTEMS INFORMATION AND UPGRADE HOT LINE
The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive the most current upgrade kits. The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world. 042003
Connecting to the Microchip Internet Web Site
The Microchip web site is available at the following URL: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: * Latest Microchip Press Releases * Technical Support Section with Frequently Asked Questions * Design Tips * Device Errata * Job Postings * Microchip Consultant Program Member Listing * Links to other useful web sites related to Microchip Products * Conferences for products, Development Systems, technical information and more * Listing of seminars and events
2003 Microchip Technology Inc.
DS21794B-page 19
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y N Literature Number: DS21794B FAX: (______) _________ - _________
Device: 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C Questions: 1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21794B-page 20
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X X X /XX Package X Lead Finish
Examples: a) b) c) d) 93AA56C-I/MS: 2K, 256x8 or 128x16 Serial EEPROM, MSOP package, 1.8V 93AA56B-I/MS: 2K, 128x16 Serial EEPROM, MSOP package, 1.8V 93AA56AT-I/OT: 2K, 256x8 Serial EEPROM, SOT-23 package, tape and reel, 1.8V 93AA56CT-I/MS: 2K, 256x8 or 128x16 Serial EEPROM, MSOP package, tape and reel, 1.8V 93LC56A-I/MS: 2K, 256x8 Serial EEPROM, MSOP package, 2.5V 93LC56BT-I/OT: 2K, 128x16 Serial EEPROM, SOT-23 package, tape and reel, 2.5V 93LC56B-I/MS: 2K, 128x16 Serial EEPROM, MSOP package, 2.5V 93LC56BXT-I/SNG: 2K, 128x16 Serial EEPROM, SOIC package, rotated pinout, Industrial temperature, Pb-free finish, 2.5V 93C56B-I/MS: 2K, 128x16 Serial EEPROM, MSOP package, 5.0V 93C56C-I/MS: 2K, 256x8 or 128x16 Serial EEPROM, MSOP package, 5.0V 93C56AT-I/OT: 2K, 256x8 Serial EEPROM, SOT-23 package, tape and reel, 5.0V
Pinout Tape & Reel Temperature Range
Device
93AA56A: 2K 1.8V Microwire Serial EEPROM 93AA56B: 2K 1.8V Microwire Serial EEPROM 93AA56C: 2K 1.8V Microwire Serial EEPROM w/ORG 93LC56A: 2K 2.5V Microwire Serial EEPROM 93LC56B: 2K 2.5V Microwire Serial EEPROM 93LC56C: 2K 2.5V Microwire Serial EEPROM w/ORG 93C56A: 93C56B: 93C56C: 2K 5.0V Microwire Serial EEPROM 2K 5.0V Microwire Serial EEPROM 2K 5.0V Microwire Serial EEPROM w/ORG
a) b) c) d)
Pinout:
Blank X
= =
Standard pinout Rotated pinout
Tape & Reel:
Blank = T =
Standard packaging Tape & Reel
a) b)
Temperature Range
I E
= =
-40C to +85C -40C to +125C
c)
Package
MS OT P SN ST
= = = = =
Plastic MSOP (Micro Small outline, 8-lead) SOT-23, 6-lead (Tape & Reel only) Plastic DIP (300 mil body), 8-lead Plastic SOIC (150 mil body), 8-lead TSSOP, 8-lead
Lead Finish:
Blank = G =
Standard 63% / 37% SnPb Pure Matte Sn
Sales and Support
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.
DS21794B-page 21
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
NOTES:
DS21794B-page 22
2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Application Maestro, dsPICDEM, dsPICDEM.net, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2003 Microchip Technology Inc.
DS21794B-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com
ASIA/PACIFIC
Australia
Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
Korea
168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934
Singapore
200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850
China - Beijing
Unit 915 Bei Hai Wan Tai Bldg. No. 6 Chaoyangmen Beidajie Beijing, 100027, No. China Tel: 86-10-85282100 Fax: 86-10-85282104
Atlanta
3780 Mansell Road, Suite 130 Alpharetta, GA 30022 Tel: 770-640-0034 Fax: 770-640-0307
Taiwan
Kaohsiung Branch 30F - 1 No. 8 Min Chuan 2nd Road Kaohsiung 806, Taiwan Tel: 886-7-536-4818 Fax: 886-7-536-4803
Boston
2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821
China - Chengdu
Rm. 2401-2402, 24th Floor, Ming Xing Financial Tower No. 88 TIDU Street Chengdu 610016, China Tel: 86-28-86766200 Fax: 86-28-86766599
Taiwan
Taiwan Branch 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Chicago
333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075
China - Fuzhou
Unit 28F, World Trade Plaza No. 71 Wusi Road Fuzhou 350001, China Tel: 86-591-7503506 Fax: 86-591-7503521
Dallas
4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924
EUROPE
Austria
Durisolstrasse 2 A-4600 Wels Austria Tel: 43-7242-2244-399 Fax: 43-7242-2244-393
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431
Detroit
Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260
Denmark
Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45-4420-9895 Fax: 45-4420-9910
China - Shanghai
Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
Kokomo
2767 S. Albright Road Kokomo, IN 46902 Tel: 765-864-8360 Fax: 765-864-8387
France
Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Los Angeles
18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338
China - Shenzhen
Rm. 1812, 18/F, Building A, United Plaza No. 5022 Binhe Road, Futian District Shenzhen 518033, China Tel: 86-755-82901380 Fax: 86-755-8295-1393
Germany
Steinheilstrasse 10 D-85737 Ismaning, Germany Tel: 49-89-627-144-0 Fax: 49-89-627-144-44
Phoenix
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7966 Fax: 480-792-4338
China - Shunde
Room 401, Hongjian Building No. 2 Fengxiangnan Road, Ronggui Town Shunde City, Guangdong 528303, China Tel: 86-765-8395507 Fax: 86-765-8395571
Italy
Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781
San Jose
2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955
China - Qingdao
Rm. B505A, Fullhope Plaza, No. 12 Hong Kong Central Rd. Qingdao 266071, China Tel: 86-532-5027355 Fax: 86-532-5027205
Netherlands
P. A. De Biesbosch 14 NL-5152 SC Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340
Toronto
6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509
India
Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062
United Kingdom
505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820
07/28/03
Japan
Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
DS21794B-page 24
2003 Microchip Technology Inc.

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